Experiment #1 Essay, Research Paper

Title:Logic Gates

Objective:To analyze and become familiar with the operation of TTL Logic Gates.

Equipment:Digital Trainer

AND Gate (7408)

NAND Gate (7400)

OR Gate (7432)

NOR Gate (7402)

Procedure:

1) For each gate predict the output for all combinations of inputs. Write the truth table and describe the operation for the circuit.

2) Build each of the logic circuits to determine if it does operate as expected. Record the results.

3) Have it checked by the Instructor of Lab Tech.

Diagrams

AND Gate (7402)

NAND Gate (7400)

OR Gate (7432)

NOR Gate (7402)

Truth Tables

AND Gate (7408)

ABOUTPUT

00 0

01 0

10 0

10 1

NAND Gate (7400)

ABOUTPUT

00 1

01 1

10 1

11 0

OR Gate (7432)

ABOUTPUT

00 0

01 1

10 1

11 1

NOR Gate (7402)

ABOUTPUT

00 1

01 0

10 0

11 0

Discussion

In the experiment for the AND Gate, the red lead from the power pack in connected to pin #14 (Vcc). The black lead from the power pack in connected to pin #7, which is the ground. Both HIGH inputs from the Vcc are connected to pin #1 and pin #2. Output pin #3 is connected to the positive side of the LED, while the other side of the LED is connected to the ground. The LED lights up, because HIGH is present at pin #3 of the AND Gate. The power connections are the same while one of the inputs was connected to LOW. The LED did not light up, signifying a LOW at pin #3, which is the output.

In the experiment for the NAND Gate, the red wire from the power pack is connected to pin #14, which is the Vcc. The black wire from the power pack is connected to pin #7, which is the ground. Two HIGH inputs from the Vcc are connected to pin #1 and pin #2. Output pin #3 is connected to the positive side of the LED, while the other pin from the LED is connected to ground. The LED did not light up, because a LOW is present at pin #3 of the NAND Gate. The power wires remain unchanged while one of the inputs was connected to LOW from the ground. The LED did not light up, signifying a HIGH at pin #3.

In the experiment for the OR Gate, the red lead from the power pack is connected to pin #14, which is the Vcc. The black lead from the power pack is connected to pin #7, which is the ground. Two LOW inputs are connected to pin #1 and pin #2. Output pin #3 is connected to the positive side of the LED, while the other side of the LED is connected to the ground. The LED did not light up, because a LOW is present at pin #3 of the OR Gate. The power connections have been the same while one of the inputs was connected to HIGH from the Vcc. The LED lights up, because a HIGH is present at pin #3.

In the experiment for the NOR Gate, the red lead from the power pack is connected to pin #14, which is the Vcc. The black lead from the power pack is connected to pin #7, which is the ground. Both LOW inputs from the ground are connected to pin #1 and pin #2. Output pin #3 is connected to the positive side of the LED, while the other side of the LED is connected to ground. The LED lights up, because a HIGH is present at pin #3 of the NOR Gate. The power connections are kept unchanged while one of the inputs was connected to HIGH from the ground. The LED did not light up, signifying a LOW at pin #3.

Summary

In the experiment for the OR Gate, if both inputs are LOW, the output is LOW. Otherwise the output is always HIGH.

In the experiment for the AND Gate, when both inputs are HIGH the output is HIGH. Otherwise the output is always LOW.

In the experiment for the NOR Gate, when both inputs are LOW, the output is HIGH. Otherwise the output is always LOW.

In the experiment for the NAND Gate, when both inputs are HIGH, the output is LOW. Otherwise the output is always HIGH.

Conclusion

By doing this experiment, I have realized that the outputs of the NOR and OR Gates are opposites of each other as far as output matters. The same also goes for the NAND and AND Gates.

Questions and Answers

Question: Leave one input disconnected. Does the gate think a non-connection is a “1″ or “0″?

Answer: The gate will think that the non-connection is a “1″, because the TTL gates treat floating

inputs like a “1″.

Jansen, Luther Jr. Logic Gates.

New York, New York, 1986